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automotive power data sheet rev. 1.0, 2012-05-07 tlf4949 5v low drop out li near voltage regulator TLF4949SJ tlf4949ej
data sheet 2 rev. 1.0, 2012-05-07 tlf4949 table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment pg-dso-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions pg-dso-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 pin assignment pg-dso-8 ep . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.4 pin definitions and functions pg-dso-8 ep . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.4.1 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.4.2 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4.3 sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4.4 preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.5 typical performance graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 supply voltage transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table of contents
type package marking TLF4949SJ pg-dso-8 tlf4949s tlf4949ej pg-dso-8 exposed pad tlf4949e pg-dso-8 pg-dso-8 exposed pad data sheet 3 rev. 1.0, 2012-05-07 5v low drop out linear voltage regulator tlf4949 1overview features ? operating dc supply voltage range 5 v to 28 v ? transient supply voltage up to 40 v ? extremely low quiescent current in standby mode ? high precision standby output voltage 5 v 1% ? output current capability up to 100 ma ? very low dropout voltage less than 0.5 v ? reset circuit sensing the output voltage ? programmable reset pulse dela y with external capacitor ? voltage sense comparator ? thermal shutdown and short circuit protections ? suitable for use in automotive electronics ? green product (rohs) ? aec qualified description the tlf4949 is a monolithic integrated 5v voltage regulator with a very low dropout output and additional functions as undervoltage reset with power-on reset delay and input voltage sense. it is designed to supply microcontroller controlled systems espe cially in automoti ve applications.
data sheet 4 rev. 1.0, 2012-05-07 tlf4949 block diagram 2 block diagram figure 1 block diagram block_diagram .vsd bandgap reference preregulator 5v reset in si pre out ro so gnd d
tlf4949 pin configuration data sheet 5 rev. 1.0, 2012-05-07 3 pin configuration 3.1 pin assignment pg-dso-8 figure 2 pin configuration pg-dso-8 3.2 pin definitions an d functions pg-dso-8 pin symbol function 1 in input; block to gnd directly at the ic with a ceramic capacitor. 2 si sense input; if not needed connect to out 3 pre preregulator output; 4 d reset delay; to select delay time, co nnect to gnd via capacitor. 5 gnd ground 6 ro reset output; open-collector output. keep open, if not needed. 7 so sense output; open-collector output. keep open, if not needed. 8 out 5-v output; connect to gnd with a capacitor 4.7 f, esr < 10 . 1) 2) 1) for the usage of capacitors with very low esr -values it is recommended to use a small 1 resistor in series. 2) measured at f = 10khz. pg-dso-8.vsd out so ro in si pre d gnd 1 3 2 8 7 6 45
data sheet 6 rev. 1.0, 2012-05-07 tlf4949 pin configuration 3.3 pin assignment pg-dso-8 exposed pad figure 3 pin configuration pg dso-8 exposed pad 3.4 pin definitions and funct ions pg-dso-8 exposed pad pin symbol function 1 in input; block to gnd directly at the ic with a ceramic capacitor. 2 si sense input; if not needed connect to out. 3 pre preregulator output; 4 d reset delay; to select delay time, co nnect to gnd via capacitor. 5 gnd ground 6 ro reset output; open-collector output. keep open, if not needed. 7 so sense output; open-collector output. keep open, if not needed. 8 out 5-v output; connect to gnd with a capacitor 4.7 f, esr < 10 1) 2) . 1) for the usage of capacitors with very low esr -values it is recommended to use a small 1 resistor in series. 2) measured at f = 10khz. exposed pad pad heat sink connect to pcb heat sink area and gnd pg-dso-8-ep.vsd out so ro in si pre d gnd 1 3 2 8 7 6 45
tlf4949 general product characteristics data sheet 7 rev. 1.0, 2012-05-07 4 general product characteristics 4.1 absolute maximum ratings note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. absolute maximum ratings 1) t j = -40c to +125c; all voltages with respect to ground, direction of current as shown in figure 4 ?application diagram? on page 15 (unless otherwise specified) 1) not subject to production test, specified by design. pos. parameter symbol limit values unit conditions min. max. voltage rating 4.1.1 dc operating supply v in -0.3 28 v ? 4.1.2 transient supply voltage v in_tr ?45v 2) 2) for transient durations of t tr < 1s. 4.1.3 preregulator output v pre ?7v? 4.1.4 voltage regulator output v out -0.3 20 v ? 4.1.5 reset output v ro -0.3 20 v ? 4.1.6 sense input v si -30 40 v ? 4.1.7 sense output voltage v so -0.3 20 v ? 4.1.8 reset delay v d -0.3 7 v ? current rating 4.1.9 preregulator output i pre ?5ma? 4.1.10 reset out i ro ?5ma? 4.1.11 sense out i so ?5ma? temperatures 4.1.12 junction temperature t j -40 150 c? 4.1.13 storage temperature t stg -50 150 c? esd susceptibility 4.1.14 esd resistivity to gnd v esd -4 4 kv hbm 3) 3) esd susceptibility, hb m according to ansi/esda/jedec js-001 (1.5 k ? , 100 pf). 4.1.15 esd resistivity to gnd v esd -1 1 kv cdm 4) 4) esd susceptibility, charged device model ?cdm? esda stm5.3.1 or ansi/esd s.5.3.1 .
data sheet 8 rev. 1.0, 2012-05-07 tlf4949 general product characteristics 4.2 functional range note: within the functional or operating range, the ic operat es as described in the circuit description. the electrical characteristics are specif ied within the conditions given in th e electrical char acteristics table. 4.3 thermal resistance note: this thermal data was generated in accordance wit h jedec jesd51 standards. fo r more information, go to www.jedec.org . table 1 pos. parameter symbol limit values unit conditions min. max. 4.2.1 input voltage range for normal operation v in 5.5 28 v ? 4.2.2 extended input voltage range v in 3.5 40 v ? 1) 2) 1) the output voltage will follow the input voltage for input voltages below v out + v dr , i.e device is in tracking mode until v out + v dr is reached. 2) input voltages ranging from > 28 v up to 40 v may only be applied for transient periods t tr < 1s. pos. parameter symbol limit values unit conditions min. typ. max. TLF4949SJ (pg-dso-8) 4.3.3 junction to soldering point 1) 1) not subject to production test, specified by design. r thjsp ?71?k/w? 4.3.4 junction to ambient 1) r thja ? 116 ? k/w ? 2) 2) specified r thja value is according to jedec jesd51-2,-7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm boar d with 2 inner copper layers (2 x 70m cu, 2 x 35m cu). 4.3.5 ? 172 ? k/w footprint only 3) 3) specified r thja value is according to jedec jesd 51-3 at natural convection on fr4 1s0p board; the product (chip+package) was simulated on a 76.2 114.3 1.5 mm 3 board with 1 copper layer (1 x 70m cu). 4.3.6 ? 145 ? k/w 300 mm 2 heatsink area on pcb 3) 4.3.7 ? 139 ? k/w 600 mm 2 heatsink area on pcb 3) tlf4949ej (pg-dso-8 exposed pad) 4.3.1 junction to case 1) r thjc ?19?k/w? 4.3.2 junction to ambient 1) r thja ?52?k/w? 4) 4) specified r thja value is according to jedec jesd51-2,-5,-7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm boar d with 2 inner copper layers (2 x 70m cu, 2 x 35m cu). where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. 4.3.3 ? 167 ? k/w footprint only 3) 4.3.4 ? 78 ? k/w 300 mm 2 heatsink area on pcb 3) 4.3.5 ? 66 ? k/w 600 mm 2 heatsink area on pcb 3) thermal shutdown 4.3.6 junction temperature t jsd ? 165 ? c 1)
tlf4949 data sheet 9 rev. 1.0, 2012-05-07 4.4 electrical characteristics 4.4.1 voltage regulator electrical characteristics: regulator v in = 14 v, t j = -40c to +125c, all voltag es with respect to ground, direction of current as shown in figure 4 ?application diagram? on page 15 (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 4.4.1 output voltage v out 4.95 5 5.05 v t j = 25c; i out = 1ma 4.4.2 4.90 5 5.10 v 6v v in 28v; 1ma i out 50ma 4.4.3 4.85 ? 5.15 v v in = 40v 1) ; 5ma i out 100ma 1) v in = 40v may be only applied as transient supply voltage to the device for maximum period of t tr < 1s. please note that also for such transient conditions, especially under hi gher load conditions, the absolute maximum rating of t j must be respected at any time. if transient conditions up to v in = 40v and elevated load currents are expected in the application a sufficient cooling must be provided to meet the power dissi pation. testing this parameter for the maximum allowed period of t = 1s is for thermal reasons not subject to production test but guaranteed by design. 4.4.4 4.85 5 5.15 6v v in 28v; 0ma i out 100ma 4.4.5 dropout voltage v dr = v in - v out v dr 0.1 0.2 0.3 0.25 0.4 0.5 v v v i out = 10ma i out = 50ma i out = 100ma 4.4.6 input to output voltage difference in undervoltage condition v io ?0.170.4 v v in = 3.5v; i out = 35ma 4.4.7 current sink capability from output to gnd i outh 2) 2) the test of this parameter ensures that the output volta ge will not exceed 5.5v in a corresponding ?no load current?- condition. a sufficiently high value for i outh will allow the output to react in a fast manner in case of a sudden decrease of load current (e.g. if load is switch ing to standby or powerdown mode) . -30 -55 ? a v in = 25v; v out = 5.5v 4.4.8 line regulation v out,line ? 1 15 mv 6v < v in < 28v; i out = 1ma 4.4.9 load regulation v out,load ? 4 20 mv 1ma i out 100ma 4.4.10 current limit i out,lim 120 240 180 400 ma ma v out = 4.5v v out = 0v 3) 3) foldback characteristic. 4.4.11 quiescent current i qse ? 180 300 a i out = 0.3ma 4.4.12 quiescent current i q ??3.6ma i out = 100ma
data sheet 10 rev. 1.0, 2012-05-07 tlf4949 4.4.2 reset 4.4.3 sense electrical characteristics: reset v in = 14 v, t j = -40c to +125c, all voltag es with respect to ground, direction of current as shown in figure 4 ?application diagram? on page 15 (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 4.4.13 reset threshold voltage v rt 4.25 4.5 4.75 v ? 4.4.14 reset threshold hysteresis v rth 50 100 200 mv ? 4.4.15 reset pulse delay t rd 55 100 180 ms calculated value: c d = 100nf; t r 100s 4.4.16 reset output low voltage v rl ??0.4 v r res 10k to v out ; v in 0v and v out 1v 1) 1) device entering this condition by decreasing v in from powered up and fully initialized operation state. 4.4.17 reset output high leakage current i rh ??1 a v res = 5v 4.4.18 delay comparator threshold v d,th ?2 ?v ? 4.4.19 delay comparator threshold hysteresis v d,th, hy ?100 ?mv ? 4.4.20 delay capacitor charge current i d,chg ?2?a v d = 1v; current flowing out of d pin 4.4.21 delay capacitor discharge current i d,dchg ?9?ma v d = 1v; current flowing into d pin electrical characteristics: sense v in = 14 v, t j = -40c to +125c, all voltag es with respect to ground, direction of current as shown in figure 4 ?application diagram? on page 15 (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. sense 4.4.22 sense low threshold v st 1.16 1.23 1.35 v ? 4.4.23 sense threshold hysteresis v sth 20 100 200 mv ? 4.4.24 sense output low voltage v sl ? ? 0.4 v v si 1.16v; v in 3.5v; r so 10k to v out 4.4.25 sense output leakage i sh ??1 a v so = 5v; v si 1.5v 4.4.26 sense input current i si -5 -1.5 0 a v si = 0
tlf4949 data sheet 11 rev. 1.0, 2012-05-07 4.4.4 preregulator electrical characteristics: preregulator v in = 14 v, t j = -40c to +125c, all voltag es with respect to ground, direction of current as shown in figure 4 ?application diagram? on page 15 (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. preregulator 4.4.27 preregulator output voltage v pre 4.556v i pre = 10 a 4.4.28 preregulator output current i pre ??10a?
data sheet 12 rev. 1.0, 2012-05-07 tlf4949 4.5 typical performance graphs typical performanc e characteristics equivalent series resistance esr(c out ) versus output current i out output voltage v out versus junction temperature t j output voltage v out versus input voltage v in dropout voltage v dr versus output current i out 0,1 1 10 100 0 102030405060708090100 esr(c out ) [ ] i out [ma] c out = 4.7f t j = 25 c v in = 6..28v stable region 4,80 4,85 4,90 4,95 5,00 5,05 5,10 5,15 5,20 -40 0 40 80 120 v out [v] t j [ c] v in = 14v i out = 1ma 0,00 1,00 2,00 3,00 4,00 5,00 6,00 0246810 v out [v] v in [v] r l = 5k t j = 25c r l = 100 0 0,05 0,1 0,15 0,2 0,25 0,3 0,35 0,4 0 255075100 v dr [v] i out [ma] t j = 25c
tlf4949 data sheet 13 rev. 1.0, 2012-05-07 dropout voltage v dr versus junction temperature t j quiescent current i q versus output current i out quiescent current i qse versus junction temperature t j quiescent current i q versus input voltage v in 0 0,1 0,2 0,3 0,4 -40 0 40 80 120 v dr [v] t j [ c] i out = 100ma i out = 50ma i out = 10ma 0 0,5 1 1,5 2 2,5 3 0,1 1 10 100 i q [ma] i out [ma] v in = 14v t j = 25c 100 150 200 250 300 -40 0 40 80 120 i qse [a] t j [ c] v in = 14v i out = 0.3ma 0 0,5 1 1,5 2 2,5 3 0 5 10 15 20 25 30 35 40 i q [ma] v in [v] r load = 100 r load = 5k t j = 25c
data sheet 14 rev. 1.0, 2012-05-07 tlf4949 reset output voltage v ro versus regulator output voltage v out reset thresholds v rt versus junction temperature t j sense output voltage v so versus sense input voltage v si sense thresholds v st versus junction temperature t j 0 1 2 3 4 5 6 4 4,2 4,4 4,6 4,8 5 v ro [v] v out [v] 4,2 4,3 4,4 4,5 4,6 4,7 4,8 -40 0 40 80 120 v rt [v] t j [ c] 0 1 2 3 4 5 6 1 1,1 1,2 1,3 1,4 1,5 v so [v] v si [v] 1,1 1,15 1,2 1,25 1,3 1,35 1,4 -40 0 40 80 120 v st [v] t j [ c]
tlf4949 application information data sheet 15 rev. 1.0, 2012-05-07 5 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 4 application diagram note: this is a very simplified example of an application circuit. the function must be verified in the real application 5.1 supply voltage transients for many other voltage regulators fast supply voltage tran sients can often be the cause of unwanted reset output signal perturbations. in contra st the tlf4949 shows a very high immunity of its reset output against such supply voltage transients. already starting fr om input voltages as low as 5.5 v t he tlf4949 shows an immunity of the reset output against supply transients of more than 100 v/s even without an additional external capacitor at the pre pin 1) 2) . 5.2 functional description description the tlf4949 is a monolithic integrated low dropout voltage regulator. seve ral outstanding feat ures and auxiliary functions are implemented to meet the requirements of supplying mi croprocessor system s in automotive applications. nevertheless, it is suitab le also in other applications where the present functions are required. the modular approach of this device allows to get eas ily also other features and functions when required. 1) please note that also for the case of such input tr ansients the absolute maximum ratings must not be violated. 2) the pre pin of the ifx4949 offers the possibility to connec t a bypass capacitor to gnd to stabilize pre output and to optimize the transient behaviour. see also section ?preregulator ? on page 17 . application_diagram .vsd bandgap reference preregulator 5v reset in si pre out ro so gnd d v batt
data sheet 16 rev. 1.0, 2012-05-07 tlf4949 application information voltage regulator the voltage regulator uses a pnp transistor as a regulati on element. with this structure a very low dropout voltage at currents of up to 100ma is obtained. the dropout operation of the standby regulator is main tained down to 3.5v input supply voltage. the output voltage is regulated up to a transient input supply voltag e of 40v. with this feature no functional interruption due to over voltage pulses is generated. the typical curve sho wing the standby output voltage as a function of the input supply voltage v s is shown in figure 5 ?output voltage vs. input voltage? on page 16 .typical values of the current consumption of this device at small lo ads (quiescent current) are less than 200a. figure 5 output voltage vs. input voltage to reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. the quiescent cu rrent as a function of the su pply input voltage is shown for two different lo ad conditions in figure 6 ?quiescent current vs. supply voltage? on page 16 . figure 6 quiescent current vs. supply voltage short circuit protection the maximum output current of the device is internally limited. in case of shor t circuit, the output current is foldback limited as described in figure 7 ?foldback characteristics of vout? on page 17 . 0,00 5,00 0 5 10 15 v out [v] v in [v] t j = 25 v t j = 25 v t j = 25 v t j = 25c 40 0 0,5 1 1,5 2 2,5 3 0 5 10 15 20 25 30 35 40 i q [ma] v in [v] r load = 100 r load = 5 k t j = 25 c
tlf4949 application information data sheet 17 rev. 1.0, 2012-05-07 figure 7 foldback characteristics of v out preregulator to improve the transient immunity a prer egulator stabilizes the inte rnal supply voltage to 5v . this internal voltage is also present at the pre pin (pin 3) . this voltage should not be used as an output because th e output capability is very small ( 10 a). this output at the pre pin may be used as an option when an improved transient behavior for supply voltages less than 8v is desired. in this case a capacitor (100 nf -1f) can be connected between the pre pin and gnd. at the same time the usage of such a bypass capacitor is suitable to reduce output noise at the out pin. if this feature is not used the pre pin must be left open. reset circuit the block circuit diagram of the reset circuit is shown in figure 8 ?reset circuit? on page 18 . the reset circuit supervises the output voltage. the reset threshold of 4.5v is defi ned by the internal reference voltage and standby output divider. the reset pulse delay time t rd , is defined by the charge ti me of an external capacitor c d : the reaction time of the reset circuit originates from the discharge time limitat ion of the reset capacitor c d and is proportional to the value of c d . 0,00 1,00 2,00 3,00 4,00 5,00 6,00 0 0,05 0,1 0,15 0,2 0,25 0,3 v out [v] i out [a] t j = 25 v t rd c d 2.0 v 2.0 a ------------ -------------- - =
data sheet 18 rev. 1.0, 2012-05-07 tlf4949 application information figure 8 reset circuit the reaction time of the reset circuit corresponds to it s noise immunity. standby out put voltage drops below the reset threshold that are only marginally longer than the reacti on time will result in a sh orter reset delay times. the nominal reset delay time will be gene rated for standby ou tput voltage drops longer than approximately 50s. the typical reset output waveforms are shown in figure 9 ?typical reset output waveforms? on page 18 . figure 9 typical reset output waveforms reset .vsd out ref 1,23v 22k 2.0v reset 2ua d vreg reset _diagram . vsd out t 1.5v 5.0v 40v vrt v in v out t rd t rr t rd reset vrt + 0.1v t r switch on switch off input drop dump output overload
tlf4949 application information data sheet 19 rev. 1.0, 2012-05-07 sense comparator the sense comparator compares an input signal with the inte rnal voltage reference of typical 1.23v. the use of an external voltage divider makes this comparator very flexible in the application. it can be used to supervise the input voltage either befo re or after a protection diode and to give additional informations to the microprocessor like low voltage warnings.
data sheet 20 rev. 1.0, 2012-05-07 tlf4949 package outlines 6 package outlines figure 10 pg-dso-8 +0.06 0.19 0.35 x 45? 1) -0.2 4 c 8 max. 0.64 0.2 6 0.25 0.2 8x m c 1.27 +0.1 0.41 0.2 m a -0.06 1.75 max. (1.45) 0.07 0.175 b 8x b 2) index marking 5 -0.2 1) 4 1 85 a 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area gps01181 0.1
tlf4949 package outlines data sheet 21 rev. 1.0, 2012-05-07 figure 11 pg-dso-8 exposed pad green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. gree n products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-dso-8-27-po v01 14 85 8 14 5 8x 0.41 0.0 9 2) m 0.2 d c a-b 1.27 c stand off +0 -0.1 0.1 (1.45) 1.7 max. 0.08 seating plane c a b 4. 9 0.1 1) a-b c 0.1 2x 3 ) jedec reference ms-012 variation ba 1) does not include plastic or metal protrusion of 0.15 max. per side 2) dambar protrusion shall be maximum 0.1 mm total in excess of lead width bottom view 0.2 3 0.2 2.65 0.2 0.2 d 6 m d 8x 0.64 0.25 3. 9 0.1 1) 0.1 0.35 x 45? cd2x +0.06 0.1 9 8 ? max. index marking for further information on packages, please visit our website: http://www.infineon.com/packages . dimensions in mm
data sheet 22 rev. 1.0, 2012-05-07 tlf4949 revision history 7 revision history revision date changes 1.0 2012-05-07 data sheet ? initial release.
edition 2012-05-07 published by infineon technologies ag 81726 munich, germany ? 2012 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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